We look for ASIC engineer to join the design team and develop LNT chips from
architecture until production.
BSc in electronic from known university (average > 85).
5+ years of experience (excellent graduates are also welcome).
Experience in logic design for complex IPs, chip integration, DFT, synthesis,
ASIC design flow.
Perl, C, TQL – advantage.
High level English (read, write, speak).
For experienced candidate.
High knowledge with front-end flow (synthesis, formal verification, STA, scan, CDC, Lint, UPF flow).
Experience with CPU domain – advantage.
Ability to lead tasks and projects.
Excellent team work.
Independent, fast implementer, smart, open minded, out-of-the-box thinking.